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Document Reference No.: FT_000165
V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.01
Clearance No.: FTDI# 154
3.3 Default Interface I/O Pin Configuration
The VNC2-64Q device device is delivered without any firmware pre-loaded. As such the IOMUX will
Data and Control Bus Configuration
Options
Pin
No.
Pin
Name
on PCB
Type
UART
SPI Slave
SPI
Parallel
Debugger
Interface
Interface
Master
Interface
FIFO
Interface
Interface
J2-18
J2-28
J2-27
J2-26
J2-24
J2-23
J2-22
J1-1
J1-2
J1-3
J1-7
J1-8
J1-9
J2-9
J2-8
J2-7
J2-6
J2-5
J2-4
J2-3
J2-2
J2-1
J2-14
J1-14
J1-15
IO0
IO20
IO21
IO22
IO23
IO24
IO25
IO26
IO27
IO28
IO32
IO33
IO34
IO35
IO36
IO37
IO38
IO39
IO40
IO41
IO42
IO43
IO4
IO5
IO6
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NA
uart_txd
uart_rxd
uart_rts#
uart_cts#
uart_dtr#
uart_dsr#
uart_dcd#
uart_ri#
uart_tx_active
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
spi_s0_clk
spi_s0_mosi
spi_s0_miso
spi_s0_cs#
spi_s1_clk
spi_s1_mosi
spi_s1_miso
spi_s1_cs#
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
spi_m_clk
spi_m_mosi
spi_m_miso
spi_m_cs#
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
fifo_data[0]
fifo_data[1]
fifo_data[2]
Debug_if
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
Table 3.2 - Default Interface I/O Pin Configuration
Copyright ? 2010 Future Technology Devices International Limited
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